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HM621400HC Series
4M High Speed SRAM (4-Mword x 1-bit)
ADE-203-1199 (Z) Preliminary Rev. 0.0 Nov. 30, 2000 Description
The HM621400HC is a 4-Mbit high speed static RAM organized 4-Mword x 1-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell)and high speed circuit designing technology. It is most appropriate for the application which requires high speed and high density memory, such as cache and buffer memory in system. The HM621400HC is packaged in 400-mil 32-pin SOJ for high density surface mounting.
Features
* Single 5.0 V supply: 5.0 V 10 % * Access time: 10 ns (max) * Completely static memory No clock or timing strobe required * Equal access and cycle times * Directly TTL compatible All inputs and outputs * Operating current: 140 mA (max) * TTL standby current: 40 mA (max) * CMOS standby current: 5 mA (max) : 1.2 mA (max) (L-version) * Data retension current: 0.8 mA (max) (L-version) * Data retension voltage: 2 V (min) (L-version) * Center VCC and VSS type pinout
Preliminary: The specification of this device are subject to change without notice. Please contact your nearest Hitachi's Sales Dept. regarding specification.
HM621400HC Series
Ordering Information
Type No. HM621400HCJP-10 HM621400HCLJP-10 Access time 10 ns 10 ns Package 400-mil 32-pin plastic SOJ (CP-32DB)
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HM621400HC Series
Pin Arrangement
32-pin SOJ A0 A1 A2 A3 A4 A5 CS VCC VSS Din WE A6 A7 A8 A9 A10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A21 A20 A19 A18 A17 A16 OE VSS VCC Dout A15 A14 A13 A12 A11 NC
Pin Description
Pin name A0 to A21 Din Dout CS OE WE VCC VSS NC Function Address input Data input Data output Chip select Output enable Write enable Power supply Ground No connection
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HM621400HC Series
Block Diagram
(LSB) A15 A14 A13 A6 A7 A8 A12 A11 A3 A1 (MSB) Din Column I/O Column decoder CS Dout
Row decoder
1024-row x 256-column x 16-block x 1-bit (4,194,304 bits)
Internal voltage generater
VCC VSS
CS
CS WE OE CS
A9A10A21A19 A20A17A16A5 A0 A2 A4 A18 (LSB) (MSB)
4
HM621400HC Series
Operation Table
CS H L L L L Note: OE x H L H L x: H or L WE x H H L L Mode Standby Output disable Read Write Write VCC current I SB , I SB1 I CC I CC I CC I CC Dout High-Z High-Z Dout High-Z High-Z Ref. cycle -- -- Read cycle (1) to (3) Write cycle (1) Write cycle (2)
Absolute Maximum Ratings
Parameter Supply voltage relative to VSS Voltage on any pin relative to V SS Power dissipation Operating temperature Storage temperature Storage temperature under bias Symbol VCC VT PT Topr Tstg Tbias Value -0.5 to +7.0 -0.5* to V CC+0.5* 1.0 0 to +70 -55 to +125 -10 to +85
1 2
Unit V V W C C C
Notes: 1. VT (min) = -2.0 V for pulse width (under shoot) 6 ns. 2. VT (max) = VCC + 2.0 V for pulse width (over shoot) 6 ns.
Recommended DC Operating Conditions (Ta = 0 to +70C)
Parameter Supply voltage Symbol VCC* VSS * Input voltage VIH VIL Notes: 1. 2. 3. 4.
3 4
Min 4.5 0 2.2 -0.5*
1
Typ 5.0 0 -- --
Max 5.5 0 VCC + 0.5* 0.8
2
Unit V V V V
VIL (min) = -2.0 V for pulse width (under shoot) 6 ns. VIH (max) = VCC + 2.0 V for pulse width (over shoot) 6 ns. The supply voltage with all VCC pins must be on the same level. The supply voltage with all VSS pins must be on the same level.
5
HM621400HC Series
DC Characteristics (Ta = 0 to +70C, VCC = 5.0 V 10 %, VSS = 0V)
Parameter Input leakage current Output leakage current Operation power supply current Symbol Min IILII IILO I I CC -- -- -- Typ*1 -- -- -- Max 2 2 140 Unit A A mA Test conditions Vin = VSS to V CC Vin = VSS to V CC Min cycle CS = VIL, lout = 0 mA Other inputs = VIH/VIL Min cycle, CS = VIH, Other inputs = VIH/VIL f = 0 MHz VCC CS V CC - 0.2 V, (1) 0 V Vin 0.2 V or (2) VCC Vin V CC - 0.2 V
Standby power supply current
I SB I SB1
-- --
-- TBD
40 5
mA mA
--* 2 Output voltage VOL VOH -- 2.4
TBD*2 -- --
1.2*2 0.4 -- V V I OL = 8 mA I OH = -4 mA
Notes: 1. Typical values are at VCC = 5.0 V, Ta = +25C and not guaranteed. 2. This characteristics is guaranteed only for L-version.
Capacitance (Ta = +25C, f = 1.0 MHz)
Parameter Input capacitance*
1
Symbol Cin CDIN
Min -- -- --
Typ -- -- --
Max 6 8 8
Unit pF pF pF
Test conditions Vin = 0 V VDIN = 0 V VDOUT = 0 V
Input/output capacitance* Note:
1
CDOUT
1. This parameter is sampled and not 100% tested.
6
HM621400HC Series
AC Characteristics (Ta = 0 to +70C, VCC = 5.0 V 10 %, unless otherwise noted.)
Test Conditions * * * * Input pulse levels: 3.0 V/0.0 V Input rise and fall time: 3 ns Input and output timing reference levels: 1.5 V Output load: See figures (Including scope and jig)
1.5 V RL=50 Dout 30 pF 255 5 pF 5V
480
Dout Zo=50
Output load (A)
Output load (B) (for tCLZ, tOLZ, tCHZ, tOHZ, tWHZ, and tOW)
Read Cycle
HM621400HC -10 Parameter Read cycle time Address access time Chip select access time Output enable to outpput valid Output hold from address change Chip select to output in low-Z Output enable to output in low-Z Chip deselect to output in high-Z Output disable to output in high-Z Symbol t RC t AA t ACS t OE t OH t CLZ t OLZ t CHZ t OHZ Min 10 -- -- -- 3 3 0 -- -- Max -- 10 10 5 -- -- -- 5 5 Unit ns ns ns ns ns ns ns ns ns 1 1 1 1 Notes
7
HM621400HC Series
Write Cycle
HM621400HC -10 Parameter Write cycle time Address valid to end of write Chip select to end of write Write pulse width Address setup time Write recovery time Data to write time overlap Data hold from write time Write disable to output in low-Z Output disable to output in high-Z Write enable to output in high-Z Note: Symbol t WC t AW t CW t WP t AS t WR t DW t DH t OW t OHZ t WHZ Min 10 7 7 7 0 0 5 0 3 -- -- Max -- -- -- -- -- -- -- -- -- 5 5 Unit ns ns ns ns ns ns ns ns ns ns ns 1 1 1 9 8 6 7 Notes
1. Transition is measured 200 mV from steady voltage with Load (B). This parameter is sampled and not 100% tested. 2. Address should be valid prior to or coincident with CS transition low. 3. WE and/or CS must be high during address transition time. 4. if CS and OE are low during this period, Dout pins are in the output state. Then, the data input signals of opposite phase to the outputs must not be applied to them. 5. If the CS low transition occurs simultaneously with the WE low transition or after the WE transition, output remains a high impedance state. 6. t AS is measured from the latest address transition to the later of CS or WE going low. 7. t WR is measured from the earlier of CS or WE going high to the first address transition. 8. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going low and WE going low. A write ends at the earliest transition among CS going high and WE going high. tWP is measured from the beginnig of write to the end of write. 9. t CW is measured from the later of CS going low to the the end of write.
8
HM621400HC Series
Timing Waveforms
Read Timing Waveform (1) (WE = VIH)
tRC
Address
Valid address tAA tACS tOH tCHZ
CS tOE OE tOLZ tCLZ Dout High Impedance Valid data tOHZ
Read Timing Waveform (2) (WE = VIH, CS = VIL , OE = VIL )
tRC
Address tOH Dout
Valid address tAA tOH
Valid data
9
HM621400HC Series
Read Timing Waveform (3) (WE = VIH, CS = VIL , OE = VIL )*2
tRC CS tACS tCLZ Dout High Impedance Valid data High Impedance tCHZ
Write Timing Waveform (1) (WE Controlled)
tWC Address Valid address tAW OE tCW CS*3 tAS WE*3 tOHZ Dout High impedance*5 tDW Din *4 tDH *4 tWP tWR
Valid data
10
HM621400HC Series
Write Timing Waveform (2) (CS Controlled)
tWC Address Valid address tCW CS *3 tAW tWP WE *3 tAS tWHZ Dout tOW High impedance*5 tDW Din *4 tDH *4 tWR
Valid data
11
HM621400HC Series
Low VCC Data Retention Characteristics (Ta = 0 to +70C)
This characteristics is guaranteed only for L-version.
Parameter VCC for data retention Symbol VDR Min 2.0 Typ*1 -- Max -- Unit V Test conditions VCC CS V CC - 0.2 V (1) 0 V Vin 0.2 V or (2) VCC Vin V CC - 0.2 V VCC = 3 V, VCC CS V CC - 0.2 V (1) 0 V Vin 0.2 V or (2) VCC Vin V CC - 0.2 V See retention waveform
Data retention current
I CCDR
--
TBD
800
A
Chip deselect to data retention time Operation recovery time Note:
t CDR tR
0 5
-- --
-- --
ns ms
1. Typical values are at VCC = 3.0 V, Ta = +25C, and not guaranteed.
Low V CC Data Retention Timing Waveform
t CDR V CC 4.5 V Data retention mode tR
2.2 V V DR CS 0V VCC CS VCC - 0.2 V
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HM621400HC Series
Package Dimensions
HM621400HCJP/HCLJP Series (CP-32DB)
Unit: mm
20.71 21.08 Max
32
17 10.16 0.13 11.18 0.13
1
3.50 0.26
1.30 Max
0.80 +0.25 -0.17
*0.43 0.10 0.41 0.08
1.27
9.40 0.25
0.10
*Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Mass (reference value) CP-32DB Conforms Conforms 1.2 g
2.85 0.12
0.74
16
13
HM621400HC Series
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
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http://semiconductor.hitachi.com/ http://www.hitachi-eu.com/hel/ecg http://sicapac.hitachi-asia.com http://www.hitachi.co.jp/Sicd/indx.htm
Hitachi Asia Ltd. Hitachi Tower 16 Collyer Quay #20-00, Singapore 049318 Tel : <65>-538-6533/538-8577 Fax : <65>-538-6933/538-3877 URL : http://www.hitachi.com.sg Hitachi Asia Ltd. (Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road, Hung-Kuo Building, Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon, Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://www.hitachi.com.hk
For further information write to:
Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic Components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 585160
Copyright (c) Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
Colophon 2.0
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